The present application relates to a semiconductor structure and a method of forming the same. More particularly, the present application relates to a compound semiconductor lateral bipolar transistor and a method of forming the same.
Bipolar junction transistors are typically found in demanding types of analog circuits, especially analog circuits used in high-frequency applications. For example, bipolar junction transistors can be found in radio frequency integrated circuits (RFICs) used in wireless communications systems, as well as integrated circuits requiring high power efficiency, such as power amplifiers in cellular telephones, and other types of high speed integrated circuits. Bipolar junction transistors may be combined with complementary metal-oxide-semiconductor (CMOS) field effect transistors in bipolar complementary metal-oxide-semiconductor (BiCMOS) integrated circuits, which take advantage of the favorable characteristics of both transistor types.
Conventional bipolar junction transistors such a vertical bipolar transistor, include three semiconductor regions, namely the emitter, base, and collector regions. Generally, a bipolar junction transistor includes a pair of p-n junctions, namely an emitter-base junction and a collector-base junction. A heterojunction bipolar transistor (HBT) is a variety of bipolar junction transistor that employs at least two semiconductor materials with unequal band gaps for the emitter/collector and base regions, creating a heterojunction.
While conventional vertical bipolar transistors still outperform existing complementary metal oxide semiconductor (CMOS) transistors in many analog and mixed signal applications, conventional vertical bipolar transistors are not suitable for use in digital applications because of the large footprint and high supply voltage (VDD)/high power consumption in a current-switch logic circuit. The collector-base junction area (ABC) of conventional vertical bipolar transistors is typically more than 3× larger than the emitter-base area, and the collector region is more lightly doped than the base region. Attempts to increase the doping level in the collector region (NC) to a level comparable with the doping level in the base region (NB) will result in a large increase in collector-base capacitance. This large and relatively lightly doped collector region causes vertical bipolar circuits to slow down dramatically if VDD is scaled below 1 V due to the saturation effect when the collector-base junction is forward biased and a large amount of minority carriers are stored on the collector region. The lightly doped collector region also limits the high-frequency performance at high current densities due to base-push-out effect.
With the advent of semiconductor-on-insulator (SOI) technology, innovative thin-base lateral bipolar transistors containing an asymmetrical emitter/collector region without ABC penalty have been developed. The asymmetrical emitter/collector design of such thin-base lateral bipolar transistors still makes them vulnerable to base-push-out effect. Moreover, thin-base lateral bipolar transistors containing an asymmetrical emitter/collector region are not suitable for operation in a saturation region. Furthermore, there are density/process cost issues that are associated with forming thin-base lateral bipolar transistors containing an asymmetrical emitter/collector region.